United States Patent and Trademark Office, Patent Assignment 20108/54:
Assignment Of Assignors Interest
Assignors
Assignee
Kim, Hyung Hwan
Paperwork Executed October 23, 2007
Jung, Jong Goo
Paperwork Executed October 23, 2007
Recorded
November 14, 2007
Hynix Semiconductor, Inc.
Officially Listed As "Hynix Semiconductor Inc."
Hynix Semiconductor, Inc.
San 136-1, Ami-ri, Bubal-eub, Ichon-shi
Kyoungki-do 467-860
SOUTH KOREA
Patents
Correspondent
Method For Planarizing An Insulation Layer In A Semiconductor Device Capable Of Omitting A Mask Process And An Etching Process
X0 Patent Application No. 11939631 , Filed November 14, 2007
A1 Application Publication No. 20080242084, Issued October 2, 2008
Richard J. Streit
Ladas & Parry LLP
Chicago, IL 60604
Updated October 2, 2008
View this assignment via USPTO Assignments on the Web
Statistics
This assignment has been viewed 5 times.
Information Facts
https://www.plainsite.org/patents/assignment.html?id=3973287
Primary Sources
Government agencies: SEC/EDGAR, federal and state courts, USPTO, IRS, and others
AI text generation None
AI document summarization None
AI-augmented search None
AI-generated images None
AI chat or Q&A interface Linkable via MCP
Third party AI contribution in government documents Possible
Document content is reproduced directly from government sources. Some filings in our database may themselves contain AI-generated content submitted by third parties to government agencies.