United States Patent and Trademark Office, Patent Assignment 21192/324: Assignment Of Assignors Interest
Assignors
Assignee
Kim, Hyung Hwan Paperwork Executed June 20, 2008
Chae, Kwang Kee Paperwork Executed June 20, 2008
Jung, Jong Goo Paperwork Executed June 20, 2008
Moon, Ok Min Paperwork Executed June 20, 2008
Lee, Young Bang Paperwork Executed June 20, 2008
Park, Sung Eun Paperwork Executed June 20, 2008
Recorded
Hynix Semiconductor, Inc. Officially Listed As "Hynix Semiconductor Inc."
Hynix Semiconductor, Inc.
Patents
Correspondent
Isolation Layer Having A Bilayer Structure For A Semiconductor Device And Method For Forming The Same
X0 Patent Application No.12167322 , Filed July 3, 2008
A1 Application Publication No.
Isolation Layer Having A Bilayer Structure For A Semiconductor Device And Method For Forming The Same
B2 Utility Patent No.8841198 , Issued September 23, 2014
Richard J. Streit Ladas & Parry LLP
Updated September 23, 2014
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Information Facts
https://www.plainsite.org/patents/assignment.html?id=4197500
Primary Sources Government agencies: SEC/EDGAR, federal and state courts, USPTO, IRS, and others
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