Alpha & Omega Semiconductor, Ltd. AOSL

Alpha & Omega Semiconductor, Ltd. Sunnyvale, CA 94086
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	Date Filed	Venue	Case Number	Title	Party Type
	4/27/2012	California Northern District Court	3:12-cv-02130-EMC	Third Dimension Semiconductor, Inc v. Alpha and Omega Semico...	Defendant
	4/27/2012	California Northern District Court	3:12-cv-02130-EMC	Third Dimension Semiconductor, Inc v. Alpha and Omega Semico...	Counter-claimant
	5/18/2007	California Northern District Court	3:07-cv-02664-JSW	Fairchild Semiconductor Corporation v. Alpha and Omega Semic...	Defendant
	5/17/2007	California Northern District Court	3:07-cv-02638-JSW	Alpha & Omega Semiconductor, Ltd et al v. Fairchild Semicond...	Plaintiff
	5/17/2007	California Northern District Court	3:07-cv-02638-JSW	Alpha & Omega Semiconductor, Ltd et al v. Fairchild Semicond...	Counter-Defendant
	10/27/2003	California Northern District Court	3:03-cv-04803	Siliconix Incorporated v. Alpha and Omega Semiconductor Inco...	Counter-claimant

6 Rows Total

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Outside Counsel (25)

	Last Name	First Name	Middle Name	Firm	Location
	BO-IN	LIN			LOS ALTOS HILLS, CA
	Group	Fortune	Law		SAN JOSE, CA
	Mackenzie	Douglas	E.		Palo Alto, CA
	LIN	BO-LIN			LOS ALTOS HILLS, CA
	TSAO	CHEIN-HWA			SAN JOSE, CA
	LINE	BO-IN			LOS ALTOS HILLS, CA
	Tsao	Chein-hwa	S.		SAN JOSE, CA
	Zhang	Jane			San Jose, CA
	Isenberg	Joshua	D.	809 Corporate Way	FREMONT, CA
	Guy	G	Hopkins	Baker Botts, LLP	Palo Alto, Ca
	Isenberg	Joshua	D.	JDI Patent	Fremont, CA
	Hulse	Matthew	Robert	Kilpatrick Townsend & Stockton, LLP
	Jr.	Daniel	Johnson	Morgan, Lewis & Bockius, LLP	Ca,
	Schuman	Brett	Michael	Morgan, Lewis & Bockius, LLP	Ca,
	Spicer	Amy	M.	Morgan, Lewis & Bockius, LLP
	Tautkus	Rita	Emily	Morgan, Lewis & Bockius, LLP	Ca,
	Wu	Andrew	J.	Morgan, Lewis & Bockius, LLP
	Doscher	Harry	Frederick	Morgan, Lewis & Bockius, LLP
	Hoffman	Ahren	Christian	Morgan, Lewis & Bockius, LLP
	Lyons	Michael	John	Morgan, Lewis & Bockius, LLP	Ca,
	Sanker	David	Vincent	Morgan, Lewis & Bockius, LLP	Palo Alto, CA
	Sun	Yalei		Morgan, Lewis & Bockius, LLP	Ca,
	Chen	Duo		Orrick Herrington & Sutcliffe LLP	Menlo Park, CA
	Adams	Stephen	N.	Orrick Herrington & Sutcliffe LLP	Menlo Park, CA
	Pelt	Lee	Van	VAN, PELT &.	LOS ALTOS, CA

25 Rows Total

Filter By Form All Records 10-K 10-K/A 10-Q 20-F 3 4 4/A 424B4 6-K 8-A12B 8-K 8-K/A ARS CERTNAS CORRESP CT ORDER DEF 14A DEFA14A EFFECT F-1 F-1/A FWP PRE 14A REGDEX S-3 S-3/A S-8 S-8 POS SC 13G SC 13G/A SC TO-C SC TO-I SC TO-I/A SD UPLOAD From To

	Date	Entity	Form Number	Description
	11/17/2025		8-K	Current report pursuant to Section 13 or 15(d)
	11/17/2025	Xue, Bing	4	Statement of changes in beneficial ownership of securities
	11/14/2025		144	Notice of proposed sale of securities pursuant to Rule 144 under...
	11/12/2025	Li, Hanqing	4	Statement of changes in beneficial ownership of securities
	11/12/2025	Jeong, Soyeon	4	Statement of changes in beneficial ownership of securities
	11/12/2025	Pfeiffer, Michael L.	4	Statement of changes in beneficial ownership of securities
	11/12/2025	Chang Lucas S.	4	Statement of changes in beneficial ownership of securities
	11/12/2025	Salameh, Michael J.	4	Statement of changes in beneficial ownership of securities
	11/12/2025	Chen Claudia	4	Statement of changes in beneficial ownership of securities
	11/12/2025	Owyang King	4	Statement of changes in beneficial ownership of securities
	11/6/2025		10-Q
	11/5/2025		8-K	Current report pursuant to Section 13 or 15(d)
	10/21/2025	Chang, Mike F.	4	Statement of changes in beneficial ownership of securities
	10/21/2025	Liang, Yi-fan	4	Statement of changes in beneficial ownership of securities
	9/18/2025		DEFA14A
	9/18/2025		DEF 14A
	9/18/2025		ARS
	9/10/2025	Chang Stephen Chunping	4	Statement of changes in beneficial ownership of securities
	9/2/2025	Xue, Bing	4	Statement of changes in beneficial ownership of securities
	8/28/2025		S-8
	8/28/2025		10-K	Annual report pursuant to Section 13 or 15(d)
	8/14/2025		SCHEDULE 13G/A
	8/6/2025		8-K	Current report pursuant to Section 13 or 15(d)
	7/14/2025		8-K	Current report pursuant to Section 13 or 15(d)
	6/5/2025		UPLOAD
	6/4/2025		CORRESP
	6/4/2025		8-K/A
	5/15/2025		UPLOAD
	5/15/2025		SCHEDULE 13G
	5/13/2025	Xue, Bing	4	Statement of changes in beneficial ownership of securities
	5/8/2025		10-Q
	5/7/2025		8-K	Current report pursuant to Section 13 or 15(d)
	4/30/2025		SCHEDULE 13G/A
	4/25/2025		CORRESP
	4/15/2025		SCHEDULE 13G/A
	4/11/2025		UPLOAD
	3/18/2025	Li, Wenjun	4	Statement of changes in beneficial ownership of securities
	3/18/2025	Xue, Bing	4	Statement of changes in beneficial ownership of securities
	3/18/2025	Liang, Yi-fan	4	Statement of changes in beneficial ownership of securities
	3/18/2025	Chang Stephen Chunping	4	Statement of changes in beneficial ownership of securities
	3/18/2025	Chang, Mike F.	4	Statement of changes in beneficial ownership of securities
	3/4/2025		8-K	Current report pursuant to Section 13 or 15(d)
	2/28/2025		SD
	2/12/2025		SCHEDULE 13G/A
	2/6/2025		10-Q
	2/5/2025		8-K	Current report pursuant to Section 13 or 15(d)
	1/14/2025	Xue, Bing	4	Statement of changes in beneficial ownership of securities
	1/13/2025		144	Notice of proposed sale of securities pursuant to Rule 144 under...
	1/3/2025	Chang Stephen Chunping	4	Statement of changes in beneficial ownership of securities
	1/3/2025	Xue, Bing	4	Statement of changes in beneficial ownership of securities

918 Rows Total	Page 1 of 19 | Go To

	Date Recorded	Party	Role	Document Type	Document No.	Invention Title
	10/8/2014	Wang, Yu	Assignor	Application Publication Patent	13231872 20120001176 8884406	Etch Depth Determination Structure Etch Depth Determination Structure Etch Depth Determination Structure
	10/8/2014	Bhalla, Anup	Assignor	Application Publication Patent	13231872 20120001176 8884406	Etch Depth Determination Structure Etch Depth Determination Structure Etch Depth Determination Structure
	10/8/2014	Li, Tiesheng	Assignor	Application Publication Patent	13231872 20120001176 8884406	Etch Depth Determination Structure Etch Depth Determination Structure Etch Depth Determination Structure
	10/8/2014	Lou, Yingying	Assignor	Application Publication Patent	13231872 20120001176 8884406	Etch Depth Determination Structure Etch Depth Determination Structure Etch Depth Determination Structure
	8/29/2014	Hebert, Francois	Assignor	Application Publication Patent	13189332 20110278665 8853772	High-mobility Trench Mosfets High-mobility Trench Mosfets High-mobility Trench Mosfets
	5/8/2014	Bhalla, Anup	Assignor	Application Publication Patent	14256843 20140225188 9214544	Source And Body Contact Structure For Trench-dmos Devices Using Polysili... Source And Body Contact Structure For Trench-dmos Devices Using Polysili... Source And Body Contact Structure For Trench-dmos Devices Using Polysili...
	5/8/2014	HÉbert, FranÇois	Assignor	Application Publication Patent	14256843 20140225188 9214544	Source And Body Contact Structure For Trench-dmos Devices Using Polysili... Source And Body Contact Structure For Trench-dmos Devices Using Polysili... Source And Body Contact Structure For Trench-dmos Devices Using Polysili...
	5/6/2014	Sun, Ming	Assignor	Application Application Publication Publication Patent Patent	13007356 14271168 20140239383 20110108896 8981464 8716063	Wafer Level Chip Scale Package And Process Of Manufacture Wafer Level Chip Scale Package And Process Of Manufacture Wafer Level Chip Scale Package And Process Of Manufacture Wafer Level Chip Scale Package And Process Of Manufacture Wafer Level Chip Scale Package And Process Of Manufacture Wafer Level Chip Scale Package And Process Of Manufacture
	5/6/2014	Ho, Yueh-se	Assignor	Application Application Publication Publication Patent Patent	14271168 13007356 20140239383 20110108896 8981464 8716063	Wafer Level Chip Scale Package And Process Of Manufacture Wafer Level Chip Scale Package And Process Of Manufacture Wafer Level Chip Scale Package And Process Of Manufacture Wafer Level Chip Scale Package And Process Of Manufacture Wafer Level Chip Scale Package And Process Of Manufacture Wafer Level Chip Scale Package And Process Of Manufacture
	5/6/2014	Feng, Tao	Assignor	Application Application Publication Publication Patent Patent	14271168 13007356 20140239383 20110108896 8981464 8716063	Wafer Level Chip Scale Package And Process Of Manufacture Wafer Level Chip Scale Package And Process Of Manufacture Wafer Level Chip Scale Package And Process Of Manufacture Wafer Level Chip Scale Package And Process Of Manufacture Wafer Level Chip Scale Package And Process Of Manufacture Wafer Level Chip Scale Package And Process Of Manufacture
	5/6/2014	HÉbert, FranÇois	Assignor	Application Application Publication Publication Patent Patent	14271168 13007356 20140239383 20110108896 8981464 8716063	Wafer Level Chip Scale Package And Process Of Manufacture Wafer Level Chip Scale Package And Process Of Manufacture Wafer Level Chip Scale Package And Process Of Manufacture Wafer Level Chip Scale Package And Process Of Manufacture Wafer Level Chip Scale Package And Process Of Manufacture Wafer Level Chip Scale Package And Process Of Manufacture
	3/3/2014	Bhalla, Anup	Assignor	Application Publication Patent	13559490 20120286356 8703563	Source And Body Contact Structure For Trench-dmos Devices Using Polysili... Source And Body Contact Structure For Trench-dmos Devices Using Polysili... Source And Body Contact Structure For Trench-dmos Devices Using Polysili...
	3/3/2014	HÉbert, FranÇois	Assignor	Application Publication Patent	13559490 20120286356 8703563	Source And Body Contact Structure For Trench-dmos Devices Using Polysili... Source And Body Contact Structure For Trench-dmos Devices Using Polysili... Source And Body Contact Structure For Trench-dmos Devices Using Polysili...
	7/9/2013	Tai, Sung-shan	Assignor	Application Publication Patent	13115097 20110223742 8507362	Process Of Forming Ultra Thin Wafers Having An Edge Support Ring Process Of Forming Ultra Thin Wafers Having An Edge Support Ring Process Of Forming Ultra Thin Wafers Having An Edge Support Ring
	7/9/2013	Feng, Tao	Assignor	Application Publication Patent	13115097 20110223742 8507362	Process Of Forming Ultra Thin Wafers Having An Edge Support Ring Process Of Forming Ultra Thin Wafers Having An Edge Support Ring Process Of Forming Ultra Thin Wafers Having An Edge Support Ring
	7/9/2013	Alpha And Omega Semiconductor Inc.	Assignee	Application Publication Patent	13115097 20110223742 8507362	Process Of Forming Ultra Thin Wafers Having An Edge Support Ring Process Of Forming Ultra Thin Wafers Having An Edge Support Ring Process Of Forming Ultra Thin Wafers Having An Edge Support Ring
	7/27/2012	Sun, Ming	Assignor	Application Publication Patent	13560786 20120289001 8497160	Method for Making Solder-top Enhanced Semiconductor Device of Low Parasi... Method for Making Solder-top Enhanced Semiconductor Device of Low Parasi... Method For Making Solder-top Enhanced Semiconductor Device Of Low Parasi...
	7/27/2012	Hebert, Francois	Assignor	Application Publication Patent	13560786 20120289001 8497160	Method for Making Solder-top Enhanced Semiconductor Device of Low Parasi... Method for Making Solder-top Enhanced Semiconductor Device of Low Parasi... Method For Making Solder-top Enhanced Semiconductor Device Of Low Parasi...
	7/27/2012	Bhalla, Anup	Assignor	Application Publication Patent	13560786 20120289001 8497160	Method for Making Solder-top Enhanced Semiconductor Device of Low Parasi... Method for Making Solder-top Enhanced Semiconductor Device of Low Parasi... Method For Making Solder-top Enhanced Semiconductor Device Of Low Parasi...
	7/27/2012	Liu, Kai	Assignor	Application Publication Patent	13560786 20120289001 8497160	Method for Making Solder-top Enhanced Semiconductor Device of Low Parasi... Method for Making Solder-top Enhanced Semiconductor Device of Low Parasi... Method For Making Solder-top Enhanced Semiconductor Device Of Low Parasi...
	5/25/2012	Havanur, Sanjay	Assignor	Application Publication Patent	12290309 20090130799 8207017	Stacked Dual Mosfet Package Stacked Dual Mosfet Package Stacked Dual Mosfet Package
	5/25/2012	Alpha And Omega Semiconductor Inc.	Assignee	Application Publication Patent	12290309 20090130799 8207017	Stacked Dual Mosfet Package Stacked Dual Mosfet Package Stacked Dual Mosfet Package
	5/17/2012	Alpha And Omega Semiconductor Inc.	Assignee	Application Publication Patent	11444977 20080006951 7598620	Copper Bonding Compatible Bond Pad Structure And Method Copper Bonding Compatible Bond Pad Structure And Method Copper Bonding Compatible Bond Pad Structure And Method
	5/16/2012	Sun, Ming	Assignor	Application Publication Patent	11149954 20060281225 7202113	Wafer Level Bumpless Method Of Making A Flip Chip Mounted Semiconductor ... Wafer Level Bumpless Method Of Making A Flip Chip Mounted Semiconductor ... Wafer Level Bumpless Method Of Making A Flip Chip Mounted Semiconductor ...
	5/16/2012	Gong, Demei	Assignor	Application Publication Patent	11149954 20060281225 7202113	Wafer Level Bumpless Method Of Making A Flip Chip Mounted Semiconductor ... Wafer Level Bumpless Method Of Making A Flip Chip Mounted Semiconductor ... Wafer Level Bumpless Method Of Making A Flip Chip Mounted Semiconductor ...
	5/16/2012	Alpha And Omega Semiconductor Inc.	Assignee	Application Publication Patent	11149954 20060281225 7202113	Wafer Level Bumpless Method Of Making A Flip Chip Mounted Semiconductor ... Wafer Level Bumpless Method Of Making A Flip Chip Mounted Semiconductor ... Wafer Level Bumpless Method Of Making A Flip Chip Mounted Semiconductor ...
	5/16/2012	Hebert, Francois	Assignor	Application Publication Patent	11444977 20080006951 7598620	Copper Bonding Compatible Bond Pad Structure And Method Copper Bonding Compatible Bond Pad Structure And Method Copper Bonding Compatible Bond Pad Structure And Method
	5/16/2012	Bhalla, Anup	Assignor	Application Publication Patent	11444977 20080006951 7598620	Copper Bonding Compatible Bond Pad Structure And Method Copper Bonding Compatible Bond Pad Structure And Method Copper Bonding Compatible Bond Pad Structure And Method
	3/27/2012	Ho, Yueh-se	Assignor	Application Publication Patent	13114063 20110221005 8169062	Integrated Circuit Package For Semiconductior Devices With Improved Elec... Integrated Circuit Package For Semiconductior Devices With Improved Elec... Integrated Circuit Package For Semiconductior Devices With Improved Elec...
	3/27/2012	Chang, Mike	Assignor	Application Publication Patent	13114063 20110221005 8169062	Integrated Circuit Package For Semiconductior Devices With Improved Elec... Integrated Circuit Package For Semiconductior Devices With Improved Elec... Integrated Circuit Package For Semiconductior Devices With Improved Elec...
	3/27/2012	Lui, Sik K.	Assignor	Application Publication Patent	13114063 20110221005 8169062	Integrated Circuit Package For Semiconductior Devices With Improved Elec... Integrated Circuit Package For Semiconductior Devices With Improved Elec... Integrated Circuit Package For Semiconductior Devices With Improved Elec...
	3/27/2012	Bhalla, Anup	Assignor	Application Publication Patent	13114063 20110221005 8169062	Integrated Circuit Package For Semiconductior Devices With Improved Elec... Integrated Circuit Package For Semiconductior Devices With Improved Elec... Integrated Circuit Package For Semiconductior Devices With Improved Elec...
	3/27/2012	Luo, Leeshawn	Assignor	Application Publication Patent	13114063 20110221005 8169062	Integrated Circuit Package For Semiconductior Devices With Improved Elec... Integrated Circuit Package For Semiconductior Devices With Improved Elec... Integrated Circuit Package For Semiconductior Devices With Improved Elec...
	3/27/2012	Alpha And Omega Semiconductor Inc.	Assignee	Application Publication Patent	13114063 20110221005 8169062	Integrated Circuit Package For Semiconductior Devices With Improved Elec... Integrated Circuit Package For Semiconductior Devices With Improved Elec... Integrated Circuit Package For Semiconductior Devices With Improved Elec...
	3/12/2012	Sun, Ming	Assignor	Application Publication	13417603 20120167384	Method of Making a Low Profile Flip Chip Power Module Method of Making a Low Profile Flip Chip Power Module
	3/12/2012	Gong, Demei	Assignor	Application Publication	13417603 20120167384	Method of Making a Low Profile Flip Chip Power Module Method of Making a Low Profile Flip Chip Power Module
	1/3/2012	Hebert, Francois	Assignor	Application Publication Patent	13199251 20110306175 8110472	High Power And High Temperature Semiconductor Power Devices Protected By... High Power And High Temperature Semiconductor Power Devices Protected By... High Power And High Temperature Semiconductor Power Devices Protected By...
	1/3/2012	Bhalla, Anup	Assignor	Application Publication Patent	13199251 20110306175 8110472	High Power And High Temperature Semiconductor Power Devices Protected By... High Power And High Temperature Semiconductor Power Devices Protected By... High Power And High Temperature Semiconductor Power Devices Protected By...
	12/21/2011	Hu, Yongzhong	Assignor	Application Publication Patent	12927177 20110124167 8105905	Configuration And Method To Form Mosfet Devices With Low Resistance Sili... Configuration And Method To Form Mosfet Devices With Low Resistance Sili... Configuration And Method To Form Mosfet Devices With Low Resistance Sili...
	12/21/2011	Tai, Sung-shan	Assignor	Application Publication Patent	12927177 20110124167 8105905	Configuration And Method To Form Mosfet Devices With Low Resistance Sili... Configuration And Method To Form Mosfet Devices With Low Resistance Sili... Configuration And Method To Form Mosfet Devices With Low Resistance Sili...
	9/25/2011	Alpha And Omega Semiconductor Inc.	Assignee	Application Publication Patent	11729311 20080238599 8058960	Chip Scale Power Converter Package Having An Inductor Substrate Chip Scale Power Converter Package Having An Inductor Substrate Chip Scale Power Converter Package Having An Inductor Substrate
	9/25/2011	Alpha And Omega Semiconductor Inc.	Assignee	Application Publication Patent	12217136 20090321929 8053891	Standing Chip Scale Package Standing Chip Scale Package Standing Chip Scale Package
	9/25/2011	Alpha And Omega Semiconductor Inc.	Assignee	Application Publication Patent	12852717 20100320531 8058727	Standing Chip Scale Package Standing Chip Scale Package Standing Chip Scale Package
	9/25/2011	Alpha And Omega Semiconductor Inc.	Assignee	Application Publication Patent	11880455 20090020854 8048775	Process Of Forming Ultra Thin Wafers Having An Edge Support Ring Process Of Forming Ultra Thin Wafers Having An Edge Support Ring Process Of Forming Ultra Thin Wafers Having An Edge Support Ring
	9/25/2011	Alpha And Omega Semiconductor Inc.	Assignee	Application Publication Patent	12215049 20090014853 8067822	Integrated Circuit Package For Semiconductior Devices With Improved Elec... Integrated Circuit Package For Semiconductior Devices With Improved Elec... Integrated Circuit Package For Semiconductior Devices With Improved Elec...
	9/24/2011	Sun, Ming	Assignor	Application Publication Patent	11729311 20080238599 8058960	Chip Scale Power Converter Package Having An Inductor Substrate Chip Scale Power Converter Package Having An Inductor Substrate Chip Scale Power Converter Package Having An Inductor Substrate
	9/24/2011	Hebert, Francois	Assignor	Application Publication Patent	11729311 20080238599 8058960	Chip Scale Power Converter Package Having An Inductor Substrate Chip Scale Power Converter Package Having An Inductor Substrate Chip Scale Power Converter Package Having An Inductor Substrate
	9/24/2011	Ho, Yueh-se	Assignor	Application Publication Patent	12217136 20090321929 8053891	Standing Chip Scale Package Standing Chip Scale Package Standing Chip Scale Package
	9/24/2011	Bhalla, Anup	Assignor	Application Publication Patent	12217136 20090321929 8053891	Standing Chip Scale Package Standing Chip Scale Package Standing Chip Scale Package
	9/24/2011	Feng, Tao	Assignor	Application Publication Patent	12217136 20090321929 8053891	Standing Chip Scale Package Standing Chip Scale Package Standing Chip Scale Package
	9/24/2011	Ho, Yueh-se	Assignor	Application Publication Patent	12852717 20100320531 8058727	Standing Chip Scale Package Standing Chip Scale Package Standing Chip Scale Package
	9/24/2011	Bhalla, Anup	Assignor	Application Publication Patent	12852717 20100320531 8058727	Standing Chip Scale Package Standing Chip Scale Package Standing Chip Scale Package
	9/24/2011	Feng, Tao	Assignor	Application Publication Patent	12852717 20100320531 8058727	Standing Chip Scale Package Standing Chip Scale Package Standing Chip Scale Package
	9/24/2011	Tai, Sung-shan	Assignor	Application Publication Patent	11880455 20090020854 8048775	Process Of Forming Ultra Thin Wafers Having An Edge Support Ring Process Of Forming Ultra Thin Wafers Having An Edge Support Ring Process Of Forming Ultra Thin Wafers Having An Edge Support Ring
	9/24/2011	Feng, Tao	Assignor	Application Publication Patent	11880455 20090020854 8048775	Process Of Forming Ultra Thin Wafers Having An Edge Support Ring Process Of Forming Ultra Thin Wafers Having An Edge Support Ring Process Of Forming Ultra Thin Wafers Having An Edge Support Ring
	9/24/2011	Ho, Yueh-se	Assignor	Application Publication Patent	12215049 20090014853 8067822	Integrated Circuit Package For Semiconductior Devices With Improved Elec... Integrated Circuit Package For Semiconductior Devices With Improved Elec... Integrated Circuit Package For Semiconductior Devices With Improved Elec...
	9/24/2011	Chang, Mike	Assignor	Application Publication Patent	12215049 20090014853 8067822	Integrated Circuit Package For Semiconductior Devices With Improved Elec... Integrated Circuit Package For Semiconductior Devices With Improved Elec... Integrated Circuit Package For Semiconductior Devices With Improved Elec...
	9/24/2011	Lui, Sik K.	Assignor	Application Publication Patent	12215049 20090014853 8067822	Integrated Circuit Package For Semiconductior Devices With Improved Elec... Integrated Circuit Package For Semiconductior Devices With Improved Elec... Integrated Circuit Package For Semiconductior Devices With Improved Elec...
	9/24/2011	Bhalla, Anup	Assignor	Application Publication Patent	12215049 20090014853 8067822	Integrated Circuit Package For Semiconductior Devices With Improved Elec... Integrated Circuit Package For Semiconductior Devices With Improved Elec... Integrated Circuit Package For Semiconductior Devices With Improved Elec...
	9/24/2011	Luo, Leeshawn	Assignor	Application Publication Patent	12215049 20090014853 8067822	Integrated Circuit Package For Semiconductior Devices With Improved Elec... Integrated Circuit Package For Semiconductior Devices With Improved Elec... Integrated Circuit Package For Semiconductior Devices With Improved Elec...
	10/27/2009	Sun, Ming	Assignor	Application Publication Patent	11150489 20060145318 7511361	Dfn Semiconductor Package Having Reduced Electrical Resistance Dfn Semiconductor Package Having Reduced Electrical Resistance Dfn Semiconductor Package Having Reduced Electrical Resistance
	10/27/2009	Liu, Kai	Assignor	Application Publication Patent	11150489 20060145318 7511361	Dfn Semiconductor Package Having Reduced Electrical Resistance Dfn Semiconductor Package Having Reduced Electrical Resistance Dfn Semiconductor Package Having Reduced Electrical Resistance
	10/27/2009	Zhang, Xiaotian	Assignor	Application Publication Patent	11150489 20060145318 7511361	Dfn Semiconductor Package Having Reduced Electrical Resistance Dfn Semiconductor Package Having Reduced Electrical Resistance Dfn Semiconductor Package Having Reduced Electrical Resistance
	10/27/2009	Alpha & Omega Semiconductor Inc.	Assignee	Application Application Publication Publication Patent Patent	10732181 11906136 20050127532 20080087992 7633140 7622796	Semiconductor Package Having A Bridged Plate Interconnection Inverted J-lead Package For Power Devices Semiconductor Package Having A Bridged Plate Interconnection Inverted J-lead Package For Power Devices Semiconductor Package Having A Bridged Plate Interconnection Inverted J-lead Package For Power Devices
	10/27/2009	Sun, Ming	Assignor	Application Publication	11029653 20060145312	Dual Flat Non-leaded Semiconductor Package Dual Flat Non-leaded Semiconductor Package
	10/27/2009	Liu, Kai	Assignor	Application Publication	11029653 20060145312	Dual Flat Non-leaded Semiconductor Package Dual Flat Non-leaded Semiconductor Package
	10/27/2009	Luo, Leeshawn	Assignor	Application Publication	11029653 20060145312	Dual Flat Non-leaded Semiconductor Package Dual Flat Non-leaded Semiconductor Package
	10/27/2009	Zhang, Xiao Tian	Assignor	Application Publication	11029653 20060145312	Dual Flat Non-leaded Semiconductor Package Dual Flat Non-leaded Semiconductor Package
	10/16/2009	Wang, Yu	Assignor	Application Publication Patent	12589045 20100099230 8053315	Method To Manufacture Split Gate With High Density Plasma Oxide Layer As... Method To Manufacture Split Gate With High Density Plasma Oxide Layer As... Method To Manufacture Split Gate With High Density Plasma Oxide Layer As...
	10/16/2009	Hebert, Francois	Assignor	Application Publication Patent	12589045 20100099230 8053315	Method To Manufacture Split Gate With High Density Plasma Oxide Layer As... Method To Manufacture Split Gate With High Density Plasma Oxide Layer As... Method To Manufacture Split Gate With High Density Plasma Oxide Layer As...
	10/16/2009	Chang, Hong	Assignor	Application Publication Patent	12589045 20100099230 8053315	Method To Manufacture Split Gate With High Density Plasma Oxide Layer As... Method To Manufacture Split Gate With High Density Plasma Oxide Layer As... Method To Manufacture Split Gate With High Density Plasma Oxide Layer As...
	10/16/2009	Hu, Yong-zhong	Assignor	Application Publication Patent	12589045 20100099230 8053315	Method To Manufacture Split Gate With High Density Plasma Oxide Layer As... Method To Manufacture Split Gate With High Density Plasma Oxide Layer As... Method To Manufacture Split Gate With High Density Plasma Oxide Layer As...
	10/16/2009	Tai, Sung-shan	Assignor	Application Publication Patent	12589045 20100099230 8053315	Method To Manufacture Split Gate With High Density Plasma Oxide Layer As... Method To Manufacture Split Gate With High Density Plasma Oxide Layer As... Method To Manufacture Split Gate With High Density Plasma Oxide Layer As...
	10/16/2009	Pan, Mengyu	Assignor	Application Publication Patent	12589045 20100099230 8053315	Method To Manufacture Split Gate With High Density Plasma Oxide Layer As... Method To Manufacture Split Gate With High Density Plasma Oxide Layer As... Method To Manufacture Split Gate With High Density Plasma Oxide Layer As...
	10/16/2009	Lou, Yingying	Assignor	Application Publication Patent	12589045 20100099230 8053315	Method To Manufacture Split Gate With High Density Plasma Oxide Layer As... Method To Manufacture Split Gate With High Density Plasma Oxide Layer As... Method To Manufacture Split Gate With High Density Plasma Oxide Layer As...
	10/9/2009	Mallikararjunaswamy, Shekar	Assignor	Application Publication Patent	12587609 20100035397 8067288	Configuration And Method Of Manufacturing The One-time Programmable (otp... Configuration And Method Of Manufacturing The One-time Programmable (otp... Configuration And Method Of Manufacturing The One-time Programmable (otp...
	10/2/2009	Sun, Ming	Assignor	Application Publication Patent	11906136 20080087992 7622796	Semiconductor Package Having A Bridged Plate Interconnection Semiconductor Package Having A Bridged Plate Interconnection Semiconductor Package Having A Bridged Plate Interconnection
	10/2/2009	Shi, Lei	Assignor	Application Publication Patent	11906136 20080087992 7622796	Semiconductor Package Having A Bridged Plate Interconnection Semiconductor Package Having A Bridged Plate Interconnection Semiconductor Package Having A Bridged Plate Interconnection
	10/2/2009	Liu, Kai	Assignor	Application Publication Patent	11906136 20080087992 7622796	Semiconductor Package Having A Bridged Plate Interconnection Semiconductor Package Having A Bridged Plate Interconnection Semiconductor Package Having A Bridged Plate Interconnection
	9/18/2009	Hu, Yong-zhong	Assignor	Application Publication	12586257 20100015770	Double gate manufactured with locos techniques Double gate manufactured with locos techniques
	9/18/2009	Tai, Sung-shan	Assignor	Application Publication	12586257 20100015770	Double gate manufactured with locos techniques Double gate manufactured with locos techniques
	6/25/2009	Hebert, Francois	Assignor	Application Publication Patent	12456949 20090263947 7851286	Bottom Source Ldmosfet Method Bottom Source Ldmosfet Method Bottom Source Ldmosfet Method
	6/25/2009	Bobde, Madhur	Assignor	Application Publication Patent	12456948 20090261883 8000124	Symmetric Blocking Transient Voltage Suppressor (tvs) Using Bipolar Tran... Symmetric Blocking Transient Voltage Suppressor (tvs) Using Bipolar Tran... Symmetric Blocking Transient Voltage Suppressor (tvs) Using Bipolar Tran...
	5/15/2009	Mallikararjunaswamy, Shekar	Assignor	Application Publication Patent	12454333 20090262476 7933102	Circuit Configurations To Reduce Snapback Of A Transient Voltage Suppres... Circuit Configurations To Reduce Snapback Of A Transient Voltage Suppres... Circuit Configurations To Reduce Snapback Of A Transient Voltage Suppres...
	3/16/2009	Hebert, Francois	Assignor	Application Publication Patent	12381813 20090181503 8053298	Planar Split-gate High-performance Mosfet Structure And Manufacturing Me... Planar Split-gate High-performance Mosfet Structure And Manufacturing Me... Planar Split-gate High-performance Mosfet Structure And Manufacturing Me...
	3/16/2009	Bhalla, Anup	Assignor	Application Publication Patent	12381813 20090181503 8053298	Planar Split-gate High-performance Mosfet Structure And Manufacturing Me... Planar Split-gate High-performance Mosfet Structure And Manufacturing Me... Planar Split-gate High-performance Mosfet Structure And Manufacturing Me...
	3/16/2009	Ng, Daniel S.	Assignor	Application Publication Patent	12381813 20090181503 8053298	Planar Split-gate High-performance Mosfet Structure And Manufacturing Me... Planar Split-gate High-performance Mosfet Structure And Manufacturing Me... Planar Split-gate High-performance Mosfet Structure And Manufacturing Me...
	2/9/2009	Wang, Yu	Assignor	Application Publication Patent	12378040 20090148995 7932148	Processes For Manufacturing Mosfet Devices With Excessive Round-hole Shi... Processes For Manufacturing Mosfet Devices With Excessive Round-hole Shi... Processes For Manufacturing Mosfet Devices With Excessive Round-hole Shi...
	2/9/2009	Chang, Hong	Assignor	Application Publication Patent	12378040 20090148995 7932148	Processes For Manufacturing Mosfet Devices With Excessive Round-hole Shi... Processes For Manufacturing Mosfet Devices With Excessive Round-hole Shi... Processes For Manufacturing Mosfet Devices With Excessive Round-hole Shi...
	2/9/2009	Tai, Sung-shan	Assignor	Application Publication Patent	12378040 20090148995 7932148	Processes For Manufacturing Mosfet Devices With Excessive Round-hole Shi... Processes For Manufacturing Mosfet Devices With Excessive Round-hole Shi... Processes For Manufacturing Mosfet Devices With Excessive Round-hole Shi...
	2/9/2009	Li, Tiesheng	Assignor	Application Publication Patent	12378040 20090148995 7932148	Processes For Manufacturing Mosfet Devices With Excessive Round-hole Shi... Processes For Manufacturing Mosfet Devices With Excessive Round-hole Shi... Processes For Manufacturing Mosfet Devices With Excessive Round-hole Shi...
	12/29/2008	Hebert, Francois	Assignor	Application Publication Patent	12345467 20100163979 7851856	True Csp Power Mosfet Based On Bottom-source Ldmos True Csp Power Mosfet Based On Bottom-source Ldmos True Csp Power Mosfet Based On Bottom-source Ldmos
	12/29/2008	Havanur, Sanjay	Assignor	Application Publication Patent	11518546 20080061396 7485954	Stacked Dual Mosfet Package Stacked Dual Mosfet Package Stacked Dual Mosfet Package
	11/18/2008	Lui, Sik K.	Assignor	Application Publication Patent	12313305 20090072301 7745878	Shielded Gate Trench (sgt) Mosfet Cells Implemented With A Schottky Sour... Shielded Gate Trench (sgt) Mosfet Cells Implemented With A Schottky Sour... Shielded Gate Trench (sgt) Mosfet Cells Implemented With A Schottky Sour...
	11/18/2008	Bhalla, Anup	Assignor	Application Publication Patent	12313305 20090072301 7745878	Shielded Gate Trench (sgt) Mosfet Cells Implemented With A Schottky Sour... Shielded Gate Trench (sgt) Mosfet Cells Implemented With A Schottky Sour... Shielded Gate Trench (sgt) Mosfet Cells Implemented With A Schottky Sour...
	9/29/2008	Lee, James	Assignor	Application Publication Patent	11316614 20070145609 7612439	Semiconductor Package Having Improved Thermal Performance Semiconductor Package Having Improved Thermal Performance Semiconductor Package Having Improved Thermal Performance
	9/29/2008	Liu, Kai	Assignor	Application Publication Patent	11316614 20070145609 7612439	Semiconductor Package Having Improved Thermal Performance Semiconductor Package Having Improved Thermal Performance Semiconductor Package Having Improved Thermal Performance
	9/29/2008	Zhang, Xiaotian	Assignor	Application Publication Patent	11316614 20070145609 7612439	Semiconductor Package Having Improved Thermal Performance Semiconductor Package Having Improved Thermal Performance Semiconductor Package Having Improved Thermal Performance
	9/29/2008	Huang, Ryan	Assignor	Application Publication Patent	11316614 20070145609 7612439	Semiconductor Package Having Improved Thermal Performance Semiconductor Package Having Improved Thermal Performance Semiconductor Package Having Improved Thermal Performance
	9/29/2008	Chang, Argo	Assignor	Application Publication Patent	11316614 20070145609 7612439	Semiconductor Package Having Improved Thermal Performance Semiconductor Package Having Improved Thermal Performance Semiconductor Package Having Improved Thermal Performance
	9/11/2008	Bhalla, Anup	Assignor	Application Publication Patent	12209106 20090008758 7884454	Use Of Discrete Conductive Layer In Semiconductor Device To Re-route Bon... Use Of Discrete Conductive Layer In Semiconductor Device To Re-route Bon... Use Of Discrete Conductive Layer In Semiconductor Device To Re-route Bon...
	9/11/2008	Chang, Allen	Assignor	Application Publication Patent	12209106 20090008758 7884454	Use Of Discrete Conductive Layer In Semiconductor Device To Re-route Bon... Use Of Discrete Conductive Layer In Semiconductor Device To Re-route Bon... Use Of Discrete Conductive Layer In Semiconductor Device To Re-route Bon...
	9/11/2008	Wang, Xiaobin	Assignor	Application Publication Patent	12209106 20090008758 7884454	Use Of Discrete Conductive Layer In Semiconductor Device To Re-route Bon... Use Of Discrete Conductive Layer In Semiconductor Device To Re-route Bon... Use Of Discrete Conductive Layer In Semiconductor Device To Re-route Bon...
	9/11/2008	Lu, Jun	Assignor	Application Publication Patent	12209106 20090008758 7884454	Use Of Discrete Conductive Layer In Semiconductor Device To Re-route Bon... Use Of Discrete Conductive Layer In Semiconductor Device To Re-route Bon... Use Of Discrete Conductive Layer In Semiconductor Device To Re-route Bon...
	9/11/2008	Zhang, Xiaotian	Assignor	Application Publication Patent	12209106 20090008758 7884454	Use Of Discrete Conductive Layer In Semiconductor Device To Re-route Bon... Use Of Discrete Conductive Layer In Semiconductor Device To Re-route Bon... Use Of Discrete Conductive Layer In Semiconductor Device To Re-route Bon...
	9/11/2008	Hu, Man Sheng	Assignor	Application Publication Patent	12209106 20090008758 7884454	Use Of Discrete Conductive Layer In Semiconductor Device To Re-route Bon... Use Of Discrete Conductive Layer In Semiconductor Device To Re-route Bon... Use Of Discrete Conductive Layer In Semiconductor Device To Re-route Bon...
	8/20/2008	Hebert, Francois	Assignor	Application Publication Patent	12229250 20100044791 7790549	Configurations And Methods For Manufacturing Charge Balanced Devices Configurations And Methods For Manufacturing Charge Balanced Devices Configurations And Methods For Manufacturing Charge Balanced Devices
	8/7/2008	Sun, Ming	Assignor	Application Publication Patent	12188160 20100032819 7776658	Compact Co-packaged Semiconductor Dies With Elevation-adaptive Interconn... Compact Co-packaged Semiconductor Dies With Elevation-adaptive Interconn... Compact Co-packaged Semiconductor Dies With Elevation-adaptive Interconn...
	8/7/2008	Liu, Kai	Assignor	Application Publication Patent	12188160 20100032819 7776658	Compact Co-packaged Semiconductor Dies With Elevation-adaptive Interconn... Compact Co-packaged Semiconductor Dies With Elevation-adaptive Interconn... Compact Co-packaged Semiconductor Dies With Elevation-adaptive Interconn...

109 Rows Total

Alpha & Omega Semiconductor, Ltd. has not been involved in any trademark assignment transactions in the PlainSite database.

Competitors (0)

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Corporate Family (25)

Track Corporate Family

• Bailey, Howard, None
• Chang Chuang Te, None
• Chang Daniel Kuang Ming, None
• Chang Lucas S., None
• Chang Stephen Chunping, None
• Chang, Mike F., None
• Chen Claudia, None
• Chen Robert I, None
• Dotz Mary, None
• Grizelj Tony, None
• Ho, Yueh-se, None
• Jeong, Soyeon, None
• Kwok Ephraim, None
• Li, Hanqing, None
• Li, Wenjun, None
• Liang, Yi-fan, None
• Owyang King, None
• Pfeiffer, Michael L., None
• Salameh, Michael J., None
• Sequoia Capital Growth III Principals Fund, None
• Sevcik Richard W, None
• Steipp, Thomas W., None
• Stevens, Mark A., None
• Xue, Bing, None
• Yilmaz, Hamza, None

Subsidiaries

• Bailey, Howard
• Stevens, Mark A.
• Steipp, Thomas W.
• Sevcik Richard W
• Chang Chuang Te
• Grizelj Tony
• Chang, Mike F.
• Ho, Yueh-se
• Liang, Yi-fan
• Dotz Mary
• Sequoia Capital Growth III Principals Fund
• Yilmaz, Hamza
• Owyang King
• Chen Robert I
• Salameh, Michael J.
• Pfeiffer, Michael L.
• Chang Daniel Kuang Ming
• Chang Lucas S.
• Chen Claudia
• Xue, Bing
• Chang Stephen Chunping
• Kwok Ephraim
• Li, Wenjun
• Li, Hanqing
• Jeong, Soyeon

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